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September 6, 2013

Rudolph’s JetStep Lithography System Maximizes Throughput while Addressing the Specific Challenges of Advanced Packaging Applications

Rudolph’s JetStep Lithography System combines an innovative optical design and numerous time-saving system features to maximize throughput and minimize cost of ownership while addressing the specific challenges of advanced packaging applications. Its large exposure field, twice the size of the nearest competitor, reduces the number of exposures required per wafer or panel and combines with other time-saving features to significantly increase the number of products processed per hour. At the same time, it has the resolution and depth of focus required to tightly control critical dimensions and sidewall characteristics in thick layers; and its long working distance avoids lens contamination when working with the thick, outgassing photoresists used in many advanced packaging applications. The system can handle round, square or rectangular substrates (Si wafers, reconstituted wafers, or panels) from 200mm, 300mm and 450mm wafers up to Gen 3.5 panels (720mm x 600mm). In addition, the JetStep System is designed to be tightly integrated with Rudolph’s inspection and data analysis systems to provide unprecedented control and analysis of the complete photolithography process.

Semiconductor manufacturers have always used photolithography to create the intricate patterns of layered materials that constitute an integrated circuit. A key component of any photolithography process is the exposure tool, which uses light to transfer a pattern from a photomask to a layer of photoresist. The exposure tool must be able to precisely replicate the mask pattern in the photoresist and align the pattern with previously fabricated structures in underlying layers. Several types of exposure tool exist: aligner, scanner, stepper, and step-and-scan.

Aligners (sometimes also known as proximity or contact printers) are used when the exposed layer contains only relatively large features, larger than 10µm. They transfer the pattern by shining collimated light through a full wafer mask held in close proximity to the wafer surface. Scanners use an optical system to project the image of the wafer mask onto the wafer surface. They can deliver higher resolution and longer working distances than proximity printers, but still require a full wafer mask. Step and repeat systems (steppers) expose only a portion of the wafer surface at one time, then step to an adjacent location and repeat the exposure. The mask covers only a fraction of the wafer surface and the stepper may reduce the size of the projected pattern (relative to the mask) by as much as 5X, both of which make the mask easier and less expensive to produce and maintain. Step-and-scan systems offer the highest resolution of currently available exposure systems and are used almost exclusively in front-end applications where features sizes may be as small as a few tens of nanometers. Like a stepper, a step-and-scan system exposes only a small portion of the wafer, but it does so by scanning a line of light over the exposure field. It then steps to the next location and repeats the scan. Compared to the full field exposure of a stepper, the step-and-scan strategy reduces the size, and therefore the cost, of the very expensive optical system needed to achieve the highest possible resolution.

Historically, shrinking feature sizes drove front-end manufacturing to move from aligners, to scanners, to steppers and, finally, to step-and-scan systems. Similarly, in the back-end, increases in the number, and resulting decreases in the size, of the I/O connections required from the integrated circuit through the package to the outside world, have driven growth in the use of steppers in advanced packaging applications. Although this trend seems likely to continue, package feature sizes are not likely to shrink beyond the resolving capability of steppers in the foreseeable future. And while step-and-scan manufacturers will continue to invest heavily in the development of new systems and technologies for front-end applications, a significant market has emerged for steppers designed to meet the specific needs of advanced packaging applications in the back-end.

Advanced packaging refers generally to the collection of technologies used to route signals from the integrated circuit (the chip or die) to the outside world. As noted, the size of these connections has shrunk as their number has grown. Packaging operations are extremely sensitive to cost, so the primary driver in system development is, and is likely to remain, cost of ownership. The JetStep System was designed specifically to increase throughput, and thereby reduce cost of ownership, while also addressing the unique challenges of advanced packaging applications.

Advanced packaging technologies use processes similar to front-end interconnect processes to fabricate connections through the layer by layer deposition of patterned conductors and insulators (Figure 1). However, advanced packaging lithography also confronts a set of challenges that are unique to the application. Feature sizes range from micrometers to hundreds of micrometers and often require photoresist or dielectric layers much thicker than those found in front-end photolithography. The lithography system must be able to supply enough energy to activate the photosensitive material (e.g. resist, polyimide, dielectric, etc.), while maintaining focus throughout the thickness to precisely control critical dimensions (CD) and sidewall profiles. Some types of photosensitive materials emit significant amounts of gas during exposure, which can contaminate optical elements located close to the wafer surface. A wide variety of substrates are used, including silicon wafers, thinned wafers, reconstituted wafers (in which separated die are embedded in a polymer compound), glass and more. The substrates may exhibit several millimeters of warp, and there may also be significant die-to-die and within-die topography resulting from embedding and bumping processes.

Figure 1. As the number of I/O lines per chip continues to grow rapidly, advanced packaging processes provide a means to route signals through the package to the outside world. Many advanced packaging processes are similar to front-end interconnect processes, which use patterned layers of conductive and insulating materials. Advanced packaging layers are applied on top of the passivation layer after chip fabrication is completed.

The remainder of this discussion will focus on the characteristics and capabilities required to optimize the performance and minimize the cost of aligners and steppers used in advanced packaging applications. Before proceeding, a note on terminology is in order. In casual discussion, steppers currently available in the commercial market are sometimes referred to by their reduction (demagnification) ratio, as a “1X” or “2X” stepper. Knowing that front-end steppers operate at 4X or 5X, it is tempting to arrange all steppers on a performance continuum using magnification as the figure of merit. While the system magnification does impact some aspects of performance, it is certainly not a primary criterion. Indeed, magnification alone is not a very good measure of optical performance. The system must be evaluated on its ability to perform against the requirements of the application. In the case of advanced packaging lithography the overriding performance goal must be maximizing profitability in the implementation and execution of advanced packaging processes. Design decisions for all aspects of the JetStep System, including the optical design, were made with this goal in mind. It may well be two times better than the “1X” competitor, but not because of the choice of magnification.

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