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September 5, 2014

Lithography Challenges for 2.5D Interposer Manufacturing

3D InCites, September 2014

In recent years, 2.5D packaging has quickly gained acceptance as an advanced packaging process, and the first products using this technology are now coming to market.¹ Most estimates project growth for 2.5D interposer packaging faster than the industry as a whole. Similar to the multi-chip modules (MCMs) of the past, 2.5D packaging processes use an interposer with vias connecting the metallization layers on its front and back surfaces between multiple silicon dice and a System-in-Package( SiP) substrate (Figure 1). 2.5D packages using high-density interposers can be a cost-effective, high-performance alternative to significantly more complex 3D or SOC integration schemes.

Lithography is a key component of 2.5D integration; however the requirements for interposer exposure systems differ significantly from the requirements of front-end lithography tools. In particular, 2.5D lithography faces specific challenges in regard to resolution, overlay, sidewall angle, exposure field size, depth of focus, warped substrate handling, and backside alignment. As with all middle- and back-end processes, interposer manufacturing must be extremely cost efficient and high yielding.

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