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November 25, 2013

Converging Front-end, Back-end and Flat Panel Display Manufacturing Technologies to Meet 2.5/3D and Fan-out Packaging Requirements

Abstract

The trend towards ever thinner, smaller, higher integrated and more capable devices is driving new advanced packaging and integration technologies such as multi-chip systems on interposer (2.5D), stacked chips (3D) or very thin fan-out packages on reconstituted wafers and panels.

These different approaches have significantly altered the requirements for manufacturing tools in the back-end. Techniques and processes which were introduced to front-end manufacturing several generations ago (e.g. 15-20 years ago) are now finding their way into back-end fabs. Despite the fairly demanding requirements, especially as it relates to overall process yield, back-end processes are still expected to demonstrate low Cost of Ownership (COO) at high throughput.

For example, a 0.5μm defect inspection would have been considered a front-end requirement 20 years ago. Today TSV and advanced packaging techniques such as fine-pitch RDL are demanding 0.5μm level inspection but at perhaps 10x improvement in wafer throughput and 20x improvement in COO. Similarly, manufacturing techniques from the Flat Panel Display (FPD) industry are playing a key role in the emerging Panel Fan-Out (P-FO) and Glass Interposer space. This paper specifically discusses the differences between established FPD processes and modern advanced packaging needs with a focus on lithography.

Other front-end capabilities ranging from metrology to Advanced Process Control (APC) that are being adopted by the back-end will also be discussed.

To download the full white paper